First off, this is an eFPGA core not a chip. It's intended for folks who want to build their own ASICs with a small amount of embedded FPGA logic.
The LUT is a boring text book 4-LUT. Fancier versions are in the works. The point of the first standard is to be the lowest common denominator of FPGAs that anyone can implement, else the threshold is too high. Kind of like RV32I.
The LUT is a boring text book 4-LUT. Fancier versions are in the works. The point of the first standard is to be the lowest common denominator of FPGAs that anyone can implement, else the threshold is too high. Kind of like RV32I.