I think a major issue with how datasheets are translated into existing EDA tools is none of the major constraints are transferred, and you usually need to manually place de-coupling capacitors or other major important components which is pretty tedious. Some tools are a bit better at this, but they might not have parameterized variants or other things that limit how well they can do it.
I 100% agree that at some point somebody graduates from Arduino and has to understand that traces are antennas. But the gap is very wide, if every EDA tool gave great static analysis errors, people could incrementally learn many EE concepts that are best learned in practice. A classic error is connecting an LED directly to digital output w/o a resistor for example, why doesn't that throw in every EDA tool? Also: assembly is fairly cheap now- part of the reason people use Arduino is because directly placing an MCU would make a circuit more difficult to assemble, and Arduino stuff can be stacked etc. I think we should have a lot more people's first circuits go right to PCB/assembly, but to do that there has to be good static analysis.
For analog designs, SPICE output and static analysis is a big goal. For complex routing, I do think people will often export into other EDA tools or need a GUI router (maybe this is important enough that simple GUI routing should be built in- I have some ideas on how to do this while keeping it code) Unless there is a really really good autolayout engine that can take user-specified hints the reality is real boards will need careful layout and re-layout.
> Another good example is the ubiquitous LM358. The designer needs to know about the electrical interface and constraints of both the input and the output. The input does not have compliance across the full supply line and the output can only push and pull current on certain load curves leading to weird things like distortion. The abstraction of the black box of the IC is broken then
I think this can be represented pretty well in code, one of the planned outputs is SPICE models and 3d. Sometimes it's not practical for an IC to have a SPICE model, but I think you could emulate a group of components with a black-box SPICE model if it's set up properly. One of the things I'm looking forward to is "complex linting" where a dev could get an error if they e.g. don't emulate a power path via SPICE.
If you're open to it (likewise to frognumber above!!!) I'd really love to talk through some of the solutions/alternatives I have planned and see if they land. My email is seve at tscircuit dot com!!
This would require repetitive SPICE simulations, or basic rule checking at the very least. Nobody does full SPICE simulations at the board level however basic input/output port checking (usually in the ERC check) does get performed. Even with RF designs, you carve out the piece you need to examine or design and simulate that. For the chips I've worked on, the full chip would get a SPICE simulation that would take days/weeks but this was for more R+D oriented mixed signal designs. I guess what I'm saying is the simulation of a circuit is best performed as a deliberate, iterative step in the circuit design process.
When it comes to layout however, you do get hints from the DRC checking tool (Design Rule Constraints) that will tell you if your trace is drawn incorrectly based on the DRC constraints and nowadays sometimes from an EM simulation that can be run in the background.
Completely automated design especially for analog will most likely never be a thing for the other reasons you list. However, I already can use "known good" circuits and modularize them for reuse which does speed things up. This is critical in the ASIC world due to the large hierarchies in the design. Modular reuse is also a growing tool in the PCB world. Cadence now has a very nice module/reuse tool that can even detect and create modules to prevent you from having to redraw the layout for a sub-circuit multiple times if its not instantiated as a module already. I always like when more people want to get involved in HW, but what the OP is showing largely exists in the form of TCL and SKILL scripts in current EDA SW packages.
I 100% agree that at some point somebody graduates from Arduino and has to understand that traces are antennas. But the gap is very wide, if every EDA tool gave great static analysis errors, people could incrementally learn many EE concepts that are best learned in practice. A classic error is connecting an LED directly to digital output w/o a resistor for example, why doesn't that throw in every EDA tool? Also: assembly is fairly cheap now- part of the reason people use Arduino is because directly placing an MCU would make a circuit more difficult to assemble, and Arduino stuff can be stacked etc. I think we should have a lot more people's first circuits go right to PCB/assembly, but to do that there has to be good static analysis.
For analog designs, SPICE output and static analysis is a big goal. For complex routing, I do think people will often export into other EDA tools or need a GUI router (maybe this is important enough that simple GUI routing should be built in- I have some ideas on how to do this while keeping it code) Unless there is a really really good autolayout engine that can take user-specified hints the reality is real boards will need careful layout and re-layout.
> Another good example is the ubiquitous LM358. The designer needs to know about the electrical interface and constraints of both the input and the output. The input does not have compliance across the full supply line and the output can only push and pull current on certain load curves leading to weird things like distortion. The abstraction of the black box of the IC is broken then
I think this can be represented pretty well in code, one of the planned outputs is SPICE models and 3d. Sometimes it's not practical for an IC to have a SPICE model, but I think you could emulate a group of components with a black-box SPICE model if it's set up properly. One of the things I'm looking forward to is "complex linting" where a dev could get an error if they e.g. don't emulate a power path via SPICE.
If you're open to it (likewise to frognumber above!!!) I'd really love to talk through some of the solutions/alternatives I have planned and see if they land. My email is seve at tscircuit dot com!!