Elsewhere in the comment section is describe the question isn’t RISC/CISC, it’s x86/Nonx86. And far more interesting since those lines are still fairly well established.
Good question. Now things are complicated. When all beginning, CISC CPUs was not one chip but board or even cabinet (like IBM S/360), and they featured customizable microcode, so you could even load different microcode on different CPUs in system.
As I know, very powerful feature of S/360 series was to supply custom microcode to make machine compatible with older IBM hardware, like 1401 series or 7xxx series (or to make your own architecture if you wish and if you have enough money).
I have not hear about customizable microcode in RISC (to be honest, I hear, it exists in ARM, but it is rare used option, if compare with IBM 360).
ARM is not a pure RISC architecture (even though its instruction set is somewhat inspired by those ideas behind RISC that stood the test of time).