Acceleration of new hashing and cryptographic algorithms, new compression algorithms, new codecs, and many other similar things, without adding special-purpose instructions for them.
Implementation of fast virtual peripherals. Accurate emulation of special-purpose hardware.
Implementation of acceleration modules for well-established software. Imagine if popular libraries or databases or other engines didn't just come with acceleration using SIMD and other instruction sets, they also came with modules loadable on an attached FPGA if you have one.
The problem is that these kind of applications suck for multi-tenant clouds which FPGAs turn out to be poorly suited for (high costs to switch out programs) and are too expensive for the consumer. So the applications are quite niche and limited to traditional use-cases of prototyping ASIC designs rather than actual algorithm accelerators which benefit more from dedicated circuitry/instructions in terms of adoption.
Acceleration of new hashing and cryptographic algorithms, new compression algorithms, new codecs, and many other similar things, without adding special-purpose instructions for them.
Implementation of fast virtual peripherals. Accurate emulation of special-purpose hardware.
Implementation of acceleration modules for well-established software. Imagine if popular libraries or databases or other engines didn't just come with acceleration using SIMD and other instruction sets, they also came with modules loadable on an attached FPGA if you have one.