>RISC has been definitively dead since Dennard scaling ran out

Except this is still not agreed upon on HN. Every single thread you did see more than half of the reply about RISC and RISC-V and how ARM v8 / POWER are no longer RISC hence RISC-V is going to win.

The RISC-V hype is crazy, but I feel like it must be a product of marketing. Or I'm missing something big. I've read the (unprivileged) instruction set spec and while it's a nice tidy ISA, it also feels like pretty much a textbook RISC with nothing to set it apart, no features to make it interesting in 2021. And it's not the first open ISA out there. Why is there so much hype surrounding it?

If anything, I got the vibe that they were more concerned about cost of implementation and "scaling it down" than about a future-looking, high-performance ISA. And I'd prefer an ISA designed for 2040s high end PCs rather than one for 2000s microcontrollers..

> Or I'm missing something big.

It's the software tooling cost.

There's nothing exceptional in the spec because it's trying to insert itself into the industry as a standard baseline, so staying small and simple is pretty intentional.

Its whole deal is that you can design a 2040's ISA or whatever you want and run 2015 Linux on it.

Everyone is jumping on it because no longer do they have to deal with a GCC/LLVM backend, and a long tail of other platform support: they can focus on the hardware, and put their instructions on RISC-V (with some set of standard extensions).

The other thing, though less impactful on the industry adoption, is that the simplicity allows hardware implementations (aka "microarchitectures") to replicate intricate out-of-order designs that we're used to in high-performance x86 (and ARM) cores, with a small fraction of the resources (https://boom-core.org/).

The real question in the high-performance space is: who will be the first to get an OoO RISC-V core onto one of TSMC's current process nodes (N7, N5, etc.)?

> Everyone is jumping on it because no longer do they have to deal with a GCC/LLVM backend

That seems like why everyone in the low-end space would be jumping on it (like WD for their storage controllers). But that's not really an advantage over the existing ARM & X86 ISAs in the mid to high-end space since they already have that software tooling built up.

But that also seems rather narrowly scoped to those who are willing to design & fab custom SoCs, which seems to need both ultra-low margins and ultra-high volumes to justify. Anyone going off-the-shelf already has things like the Cortex-M with complete software tooling out of the box. And anyone going high-margin can always just take ARM's more advanced licenses to start with a better baseline & better existing software ecosystem (ex, graviton2, Apple Silicon, Nvidia's Denver, Carmel & Grace, etc..)

Yea I think most of the people hyping it here are just consumers and software developers with no plans to make custom cores. If anything, I imagine these people would rather have standard cores that work ootb rather than something customized. So I don't believe this aspect is a reasonable explanation for much of the hype.

I agree that ARM isn't going anywhere, as long as it can be licensed for less than it takes to design a good-enough RISC-V core, it will get used (with opensource designs slowly lowering the latter on average).

It's really more the small vendor ISAs that I expect to become rarer with time, not the existing ISAs to go away.

Frankly, RISC-V feels perhaps a decade too late, but so does LLVM, and alternate history is such a rabbit hole so I won't go into it (but I suspect e.g. Apple would've had a less obvious choice for the M1, if RISC-V had been around for twice as long).

> But that also seems rather narrowly scoped to those who are willing to design & fab custom SoCs

I'm expecting most of the (larger) adopters are already periodically (re)designing and fabbing their own hybrid compute + specialized functionality - like the WD example you mention (Nvidia replacing its Falcon management cores being another).

I don't know for sure, but I also suspect some of them also want to avoid having Arm Ltd. (or potentially soon, Nvidia) in the loop, even if they could arrange to get their custom extensions in there.

> I agree that ARM isn't going anywhere, as long as it can be licensed for less than it takes to design a good-enough RISC-V core, it will get used (with opensource designs slowly lowering the latter on average).

You don't have to design it yourself. The foundaries are working towards free hard cells of RISC-V cores in most of their PDKs. It's hard for ARM to compete with free.

Esperanto Technologies already did (ET-SoC-1 has four OoO RV64GC cores), but I doubt they were first.

Their SIMD vectorized instructions are very neat and clean up the horrible mess of x64 ISA (I am not familiar enough with Neon and SVE so I don't know if ARM is a mess too)

I don't get the hype either. RISC-V is basically MIPS, and probably will replace the latter in all the miscellaneous places it's currently used.

It is both.

RISC-V has some big names promoting it heavily.

What open ISA would be a real competitor to RISC-V?

> Why is there so much hype surrounding it?

I Am Not A RISC Expert (IANARE), but I think it boils down to how reprogrammable each core is. My understanding is that each core has degrees of flexibility that can be used to easily hardware-accelerate workflows. As the other commenter mentioned, SIMD also works hand-in-hand with this technology to make a solid case for replacing x86 someday.

Here's a thought: the hype around ARM is crazy. In a decade or so, when x86 is being run out of datacenters en-masse, we're going to need to pick a new server-side architecture. ARM is utterly terrible at these kinds of workloads, at least in my experience (and I've owned a Raspberry Pi since Rev1). There's simply not enough gas in the ARM tank to get people where they're wanting it to go, whereas RISC-V has enough fundamental differences and advantages that it's just overtly better than it's contemporaries. The downside is that RISC-V is still in a heavy experimentation phase, and even the "physical" RISC-V boards that you can buy are really just glorified FPGAs running someone's virtual machine.