The idea is to increase yields by putting the bigger chips in the middle, and smaller chips around the edges—perhaps for different customers entirely…
And "yield" in this case is not how many chips can be placed on a wafer, but how many of them will not have defects in critical areas.
TSMC themselves don't care how many chips gets made from a single wafer.
The idea is to increase yields by putting the bigger chips in the middle, and smaller chips around the edges—perhaps for different customers entirely…