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   "FCBGA package with 2892 pins"
Yikes! Thats pretty dense on the other side, would love to see a picture.

It's a 100 watts, so at 3.3 volts its drawing 30+ amps, so I'm guessing that a good chunk of those pins are power and ground. Is that a good theory?




Since the page is already on the way down here is a rehost: http://i.imgur.com/beAY5De.png


Thanks to the two of you, it's even more amazing than I though.


Look, pixel art.


Modern cores are more like 1V or lower. so more like 100A


That's crazy. Do modern cores not also use local, integrated power regulation? I think I remember an Intel PR release about that, but I don't know the detail.


> Process:Manufacturing with 28nm process

standard Vcc for 28nm is 850-1050mV (varies based on the exact process)

so yeah more like 100A and probably that's all going through the pins without on die power regulation


The inductors are still too big to be on-chip


Intel toyed around with fully integrated inductors even in production but I think they kicked them off chip for thermal reasons.


IIRC, the only part they replaced was the controller IC itself. All of the main power components (switching transistors, filter inductors and capacitors) remained off-chip.

Consider that the VRM's have as much or more silicon in them than in the host processor, and they have completely different breakdown voltage and switching speed requirements relative to a CPU.


Intel only recently introduced this feature, and it surely required a lot of R&D. At the time they were most likely the only one, and may still be.


Then they removed it in their most recent chips...


Followup question. Now that we know it's 100 amps of current going to the chip. In a conservertive world that would be ~300 power and another ~300 ground pins. (Could be 100 of each)

Lets talk board layers. My best board was two data, one power and one ground. I was nowhere near 100 amps for current needs. How many layers in a motherboard to support this CPU?

I'm thinking that these state of the art chips are really pushing the support infrastructure of board layers and power supplies.

Thanks1


Does each CPU have its own path to memory?


Who still uses 3v3 on these kinds of chips? Even cheap ass FPGAs use 1v8.




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