Several processors support this by effectively locking cache lines. At the low end, it allows a handful of fast interrupt routines without dedicated TCM. At the high end, it allows boot ROMs to negotiate DRAM links in software, avoiding both the catch 22 and complex hardware negotiation.
Very similar config, but I bought a second pair of ram. Running 4 sticks at 3600.
Also, the LAN port of the motherboard stopped working after a week, so I had to buy an Ethernet card
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