Considering the PCIe context, I was assuming we were talking about off-chip connections, i.e. diff microstrips/striplines in FR4 and air. εr is 2.6-ish there.
But you're right, I might have accidentally mixed in some radio connection bits, with the HFT company anecdote.
The full optical wave is contained in the dielectric conductor. This conductor needs it's minimum cross section such that the wave can propagate. If it is too small then the wave can not propagate. Also there is a maximum cross section if you want single mode operation.
You get to this result if you take the electromagntic wave equation - a partial differential equation - and solve that for your transmission line configuration.
The proper analogy in the realm of electrical waveguides is the hollow waveguide. The hollow waveguide supports TE- and TM-modes but not TEM modes just like a dielectric conductor. The size is also a function of the dielectric constant ε.
What we mostly use are TEM waveguides like microstrips or coaxial cables. The difference between electrical waveguides that supports TEM modes and waveguides that supports TE/TM modes is that the former has two independent potential planes and the latter only one. Also TEM waveguides do not have a lower cutoff frequency. A TEM wave with any frequency can propagate on any microstrip configuration.
This is not true for TE/TM waves.
What's important to understand is that for microstrips/coaxial cables the power isn't transferred in the metal but in the space (dielectric) around the metal - see Poynting vector. So what happens if you have a second conductor in that space? You get crosstalk! So TEM transmission lines do not contain the wave like hollow waveguides or optical fibers (edit: ok coaxial cables do, microstrips don't)
Now the question, how big is the microstrip? Is it just the width of the signal conductor? No, it is not.
Edit: The width of the metal lines in a chip is given by the current it must carry - current density requirement, electro-migration issues. Power lines are wide because they have to supply power to the circuit but logic traces in CMOS technology only carry negligible amount of current. In circuits like RF power amplifiers with bipolar transistors the trace width is much larger because it has to carry a much larger current. But again, microstrip lines do not have a lower cutoff frequency.
My mullvad installation on Windows has 258MB but memory footprint is low. I find 5 entries in the task manager with a total of 14.6MB with active connection.
Maybe not Electron, then. Perhaps I'm confusing it with ExpressVPN's first-party app, which definitely was Electron when I tried them a few years back.
> The question then is, why does only a single crystal form, rather than multiple crystal filaments oriented at different directions according to whichever grain contacted the starting point of the filament...
The silicon wants to be in the lowest energy state and it does so by forming a face centered cubic crystal (diamond structure). The formation of crystals depends on the cooling rate. If matter cools to fast, it can't form a crystal structure.
The relative permittivity εr of SiO2 is ~4.
c = c0 / sqrt(εr)
c0 = 1 /sqrt(ε0εr × μ0μr) and in vacuum εr=μr=1.
But the frequency needs to be sufficiently high in order to observe wave propagation, let's say >10GHz.
For low frequencies the electric conductor behaves more like a RC chain.