I'm interested to know if the L3 cache all behaves as a single pool for any core on either CCD, whether there's a penalty in access time depending on locality or whether they are just entirely localised.
And that answer is good enough for most workloads. You should stop reading now.
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The complex answer is that there is some ability one CCD to pull cachelines from the other CCD. But I've never been able to find a solid answer for the limitations on this. I know it can pull a dirty cache line from the L1/L2 of another CCDs (this is the core-to-core latency test you often see in benchmarks, and there is an obvious cross-die latency hit).
But I'm not sure it can pull a clean cacheline from another CCD at all, or if those just get redirected to main memory (as the latency to main memory isn't that much higher than between CCDs). And even if it can pull a clean cacheline, I'm not sure it can pull them from another CCD's L3 (which is an eviction cache, so only holds clean cachelines).
The only way for a cacheline to get into a CCD's L3 is to be evicted from an L2 on that core, so if a dataset is active across both CCDs, it will end up duplicated across both L3s. Cachelines evicted from one L3 do NOT end up in another L3, so an idle CCD can't act as a pseudo L4.
I haven't seen anyone make a benchmark which would show the effect, if it exists.
AMD didn't have to introduce a special driver for the Ryzen 9 5950x to keep threads resident to the "gaming" CCD. There was only a small difference between the 5950x and the non-X3d Ryzen 7 5800x in workloads that didn't use more than 8 cores unlike the observed slowdowns in the Ryzen 9s 7950X3D and 7900X3D when they were released compared to the Ryzen 7 7800X3D .
When the L3 sizes are different across CCDs the special AMD driver is needed to keep threads pinned to the larger L3 CCD and prevent them from being placed on the small L3 CCD where their memory requests can exploit the other CCD's L3 as an L4. The AMD driver reduces CCD to CCD data requests by keeping programs contained in one CCD.
With equal L3 caches when a process spills onto the second CCD it will still use the first's L3 cache as "L4" but it no longer has to evict that data at the same rate as the lopsided models. Additionally the first CCD can use the second CCD's L3 in kind reducing the number of requests that need to go to main memory.
The same sized L3s reduce contention to the IO die and the larger sized L3s reduce memory contention, it's a win-win.
It does not. For any of the dual CCD parts AMD has ever released for consumers. Even Strix Halo which has higher bandwidth, lower latency interconnect doesn't make a single L3 across CCDs.
It'll probably only happen when they have a singular, large die filled with cache upon which both CCDs are stacked.
more to the point, I hope that the electrical certification for computer's is getting ago over, as these GPU's make more heat than the smallest electrical heaters on sale
cant help but consider a whole different mounting
option, where,
I keep toying with the idea of doing a solar powered, crypto mine, that pre heats water for a coin-opp laundromat business. There are water to water heat pumps that are for boosting the water temp up to whats required for comercial hot water, while cooling the per-heat tank back down to a good temp for the GPU's.
Laundromats are one of the places that are truely timeless, with a particular and wide cross section of society rubbing shoulders, proper diners are similar, but are now mostly gone, unfortunate as both enforce a strangely formal civility and even camradery on people who rarely otherwise share space.
Lots of gushing about AI but I'm not really too interested in that.... more about what's up with your missing platelets! I'm assuming it's not at all a good thing to suddenly not have any without any prior history of things related to this? Hope everything works out okay in the end :).
That there's a probability of 4.20e-05 that the observed difference of that large would happen by chance due to observation noise if there would be no real difference (given your assumptions about the data generating process holds).
The normality assumption is a large stretch, especially since there an absolute lower limit near the observation and a somewhat discrete distribution, so a t-test isn't appropriate. But then again it looks significant, so there's no real need for a test
It's because walls are a bit too steep. If you made them into paraboloid, a per would naturally climb as high as they need to, to be able to run symmetrically.
Person running would need to constantly turn a bit to one side to not climb further up the wall. So it shouldn't be much different from running in circles on flat surface.
Not sure if runners that train by running in small circles are concerned about evenness and try to run the same amount clockwise and counter clockwise to even things out.
Ex collegiate track and XC athlete, yes, we'd alternate directions once in a while when doing long workouts on the track. It's a 36.5m radius, and it does get to you eventually. You feel it in your knees long before your ankles. I ran distance events (1500, 3200, 5k), so I think I had it easier than the 200m and 400m guys (and especially the 400m/300m hurdle guys) whose spikes were desperately clawing at the track to hold the turn, but I did have some workouts with a lot of laps. We didn't bother to make it exactly even, but if we were doing ladder workouts we'd switch directions somewhere near the middle.
Indoor meets often had 200m tracks with tighter (frequently nonstandard!) radii. The good ones were banked, though it never seemed to be at the right angle, always too steep or too shallow.
Every race still goes counterclockwise, though.
Maybe it's my XC side talking, but I'd love to see a track in a figure 8 with an underpass. Left turn, over the bridge, right turn , under the bridge, and repeat! It would break up those monotonous 8 and 12 lap races nicely, and you could fit a longer track in a shorter rectangular building by using the hypotenuse. I'm sure people would hate the hilly incline, though...
I did HS sprinting as cross training for fencing. Fencing is extremely asymmetric, to the point where my right (front) leg could lift twice the weight of my back (left) leg. It was freakish, and probably not healthy lol. It made my sprinting coach really uncomfortable, because my stride looked weird on the straights.
The curves felt great for me though, I really liked the 200m better than the 100m. Can't imagine how shitty it'd have been for a left handed fencer to run track, because the big muscles would be on the inside leg.
That would be extremely interesting, but the fact that you have an incline would change the ideal body type and tactics so much it would be a different sport at that point.
But I would love to see it for medium distances, just to see what crazy stuff would happen!
This is steaming my brain a bit. Is it not the case (assuming an "optimal" tilt of the track) that the inner leg would travel more radii each step, meaning you would travel a larger segment of the circle on every inner step than outer step, ending up with an equal gait? This is my intuition without any formulated proof.
Element employed quite a few IRC folk until the recent budget cuts. My experience as IRC client dev was actually what got me hired. (though I also departed Element during the latest round of budget cuts)
